1. Field of the Invention
This invention relates in general to resonators in MOS technology constructed by means of switched capacitors with at least one accumulator stage having a line at a reference potential and a continuous signal series arm from the accumulator input to the accumulator output, in which the signal series arm has a series switch which is connected to the accumulator input and in the accumulator shunt arm a first capacitor is connected to a reference potential, and at least one series connection is parallel to the first capacitor and comprises a cross switch and a further capacitor which goes to reference potential.
2. Description of the Prior Art
Resonator circuits in MOS technology for scanned analog signals are known as, for example, from the article "Analog Simple Data Filters" by David L. Fried (IEEE Journal of Solid-State Circuits), pages 302 through 304, August, 1972. In the circuits described in this article, the information processing is accomplished by the use of capacitors which are charged and connected with one another through clock pulse transistors in the manner of a recursive accumulator circuit. An accumulator stage is illustrated in FIG. 1 on page 303 of the above described article. The input voltage is impressed on the capacitor C1 by way of a switch at the input side, whereas the further switch is opened. The charge equalization between capacitors C1 and C2 occurs after the opening of the input side switch and the closing of the further switch.
In FIG. 3 of the above article, the diagram of a MOSP resonator with an accumulator stage consisting of four accumulators is described. In this arrangement, the four accumulators are successively connected to the capacitor C1 which corresponds to four scanning values per signal period upon resonance.
Such circuits are distinguished by means of the relatively simple realization in single layer MOS technology and by the simplicity of the clock pulse pattern functioning without overlapping.